Every AI accelerator placed against the control thresholds: EAR classification (ECCN 3A090/4A090), performance parameters, and license-exception applicability per destination.
Restricted for China: no licence pathway under the rules in force.
Licence required, reviewed case by case, with conditions attached.
Engineered to fall below the thresholds. The one such part publishes no figure on either axis, so the compliance category is exactly where the specifications go dark.
Chinese-manufactured, outside US export control directly — though their fabricators inherit equipment restrictions.
Outside the controls: internal cloud silicon that is never sold, or parts below the classification threshold.
Carry estimated specifications, drawn with a dashed stroke. Huawei publishes no Ascend datasheet, and the China-channel NVIDIA parts have none either.
Threshold rules on record, 2022–2026, drawn on the date rail beneath the field. One carries a quantitative value — 600 GB/s of aggregate interconnect — measured on an axis this field does not plot. 3 parts publish an interconnect figure below it (A800, H800 SXM5, H800 PCIe); all are restricted today.
The classification rules are written in two measures — how much dense arithmetic a part does, and how fast it can move weights through memory — so those are the axes. 8 tracked parts publish a memory bandwidth at or above the 6,500 GB/s DRAM threshold the classification prose cites, and 7 of those are restricted. 4 parts sit under case-by-case review with conditions attached. The highest-compute Chinese domestic part on record here publishes 900 TFLOPS dense, against 2,516.6 for the highest-compute part the field holds.
6 of the 36 tracked parts are compliance variants: an existing die cut down to clear a threshold. A800 on A100 SXM and H800 PCIe on H100 PCIe land exactly on top of the parts they were cut from, because what was reduced was interconnect bandwidth — which this field does not plot, and which the October 2023 rule superseded with a combined metric anyway. The variant whose position moved furthest, H20 SXM, publishes 148 TFLOPS dense against the H100 SXM5’s 989.5, while its memory bandwidth went the other way — 3,350 to 4,000 GB/s.
| Chip | Vendor | China status | FP16 dense | Mem BW |
|---|---|---|---|---|
| Cerebras WSE-3 | Cerebras | Restricted | 125,000 | 21,000,000 |
| AMD Instinct MI355X | AMD | Restricted | 2,516.6 | 8,000 |
| MI350X | AMD | Restricted | 2,309.6 | 8,000 |
| B200 | NVIDIA | Restricted | 2,250 | 8,000 |
| Gaudi 3 | Intel | Restricted | 1,835 | 3,700 |
| B100 | NVIDIA | Restricted | 1,750 | 8,000 |
| MI300X | AMD | Restricted | 1,307.4 | 5,300 |
| MI325X | AMD | Case-by-Case Review | 1,307.4 | 6,000 |
| H100 SXM5 | NVIDIA | Restricted | 989.5 | 3,350 |
| H800 SXM5 ~ | NVIDIA | Restricted | 989.5 | — |
| H200 SXM | NVIDIA | Case-by-Case Review | 989.5 | 4,800 |
| Google TPU v6e (Trillium) | Not Export-Controlled | 918 | 1,638 | |
| Huawei Ascend 920 ~ | Huawei | Domestic (China) | 900 | 4,000 |
| H100 NVL | NVIDIA | Restricted | 835.5 | 3,938 |
| Huawei Ascend 910C ~ | Huawei | Domestic (China) | 780 | 3,200 |
| H100 PCIe | NVIDIA | Restricted | 756 | 2,000 |
| H800 PCIe | NVIDIA | Restricted | 756 | 2,000 |
| Google TPU v5p | Not Export-Controlled | 459 | 2,575 | |
| Ascend 910B ~ | Huawei | Domestic (China) | 375 | 1,600 |
| A100 SXM | NVIDIA | Restricted | 312 | 2,039 |
| A800 | NVIDIA | Restricted | 312 | 2,039 |
| Google TPU v4 | Not Export-Controlled | 275 | 1,200 | |
| TPU v5e | Not Export-Controlled | 197 | 819 | |
| H20 SXM ~ | NVIDIA | Case-by-Case Review | 148 | 4,000 |
| H20E (HBM3E refresh) ~ | NVIDIA | Case-by-Case Review | 148 | — |
| Tenstorrent Wormhole n300 | Tenstorrent | Not Export-Controlled | 131 | 576 |
| AMD Instinct MI400 ~ | AMD | Restricted | — | 19,600 |
| AWS Trainium3 ~ | Amazon | Not Export-Controlled | — | 4,900 |
| B30A ~ | NVIDIA | Designed Compliant | — | — |
| Gaudi 2 ~ | Intel | Restricted | — | 2,450 |
| Google TPU v7 (Ironwood) | Not Export-Controlled | — | 7,370 | |
| Huawei Ascend 910D ~ | Huawei | Domestic (China) | — | — |
| NVIDIA B300 | NVIDIA | Restricted | — | 8,000 |
| NVIDIA R200 (Rubin) ~ | NVIDIA | Restricted | — | 22,000 |
| R100 (Rubin) ~ | NVIDIA | Restricted | — | — |
| Tenstorrent Blackhole p150 | Tenstorrent | Not Export-Controlled | — | 512 |
ReadingDense FP16/BF16 TFLOPS and memory bandwidth in GB/s, ordered as the field is, with unpublished figures left empty. 23 of these rows carry both measures and are drawn as marks; the rest sit in the rails or, for the 4 with nothing comparable to place, in this table alone.
Loading the register…
Families tracked, 36 parts in all; the longest lane is NVIDIA Hopper at 8 generations.
Compliance variants — parts cut from an existing die to clear a threshold. Where the variant skips generations, an arc joins it to its parent.
Generation steps that cross an export-status boundary: the point in a lane where the ink changes.
Parts a rule names in its newly-restricted list, stamped with the year it took effect.
A100 SXM
NVLink 600→400 GB/s
A800
H100 SXM5
Mem BW 3,350→2,000 GB/s; HBM3→HBM2e; FP16 989.5→756
H100 PCIe
Mem BW 2,000→3,938 GB/s; Mem 80→94 GB; HBM2e→HBM3; FP16 756→835.5
H100 NVL
NVLink 600→400 GB/s; Mem 94→80 GB; FP16 835.5→989.5; specs unverified
H800 SXM5
HBM3→HBM2e; FP16 989.5→756
H800 PCIe
NVLink 400→900 GB/s; Mem BW 2,000→4,800 GB/s; Mem 80→141 GB; HBM2e→HBM3E; FP16 756→989.5; Restricted → Case-by-Case Review
H200 SXM
Mem BW 4,800→4,000 GB/s; Mem 141→96 GB; HBM3E→HBM3; FP16 989.5→148; specs unverified
H20 SXM
Mem 96→144 GB; HBM3→HBM3E
H20E (HBM3E refresh)
B100
FP16 1750→2250
B200
Mem 192→288 GB; HBM3E→HBM3e
NVIDIA B300
Mem 288→144 GB; HBM3e→HBM3E; specs unverified; Restricted → Designed Compliant
B30A
R100 (Rubin)
same compute, different policy
NVIDIA R200 (Rubin)
MI300X
Mem BW 5,300→6,000 GB/s; Mem 192→256 GB; HBM3→HBM3E; Restricted → Case-by-Case Review
MI325X
Mem BW 6,000→8,000 GB/s; Mem 256→288 GB; FP16 1307.4→2309.6; Case-by-Case Review → Restricted
MI350X
FP16 2309.6→2516.6
AMD Instinct MI355X
Mem BW 8,000→19,600 GB/s; Mem 288→432 GB; HBM3E→HBM4; specs unverified
AMD Instinct MI400
Ascend 910B
Mem BW 1,600→3,200 GB/s; Mem 64→128 GB; HBM2e→HBM
Huawei Ascend 910C
same compute, different policy
Huawei Ascend 910D
same compute, different policy
Huawei Ascend 920
Gaudi 2
Mem BW 2,450→3,700 GB/s; Mem 96→128 GB
Gaudi 3
Google TPU v4
Mem BW 1,200→819 GB/s; Mem 32→16 GB; HBM2→HBM2e
TPU v5e
Mem BW 819→2,575 GB/s; Mem 16→95 GB
Google TPU v5p
NVLink 1200→800 GB/s; Mem BW 2,575→1,638 GB/s; Mem 95→32 GB; HBM2e→HBM
Google TPU v6e (Trillium)
Mem BW 1,638→7,370 GB/s; Mem 32→192 GB; HBM→HBM3e
Google TPU v7 (Ironwood)
AWS Trainium3
Cerebras WSE-3
Tenstorrent Wormhole n300
Mem BW 576→512 GB/s; Mem 24→32 GB
Tenstorrent Blackhole p150
2022-10-13October 2022 Advanced Computing Rule87 FR 62186
Compute performance (TFLOPS) and interconnect bandwidth
ECCN 3A090: chips with peak performance ≥300 TFLOPS (aggregate bidirectional transfer rate ≥600 GB/s) or ≥600 TOPS (certain configurations). Caught A100 and H100; A800 designed to comply via reduced interconnect.
Oct 2022 interconnect threshold (600 GB/s) — 600 GB/s
Newly restricted: A100 SXM, H100 SXM5.
2023-10-25October 2023 Advanced Computing Update88 FR 73458
Total Processing Performance (TPP): 2 × MacTOPS × bit-length, summed across processing units
Introduced TPP metric combining compute and bandwidth. Closed the A800/H800 interconnect-reduction loophole. Also broadened end-use controls.
Newly restricted: A800, H800 SXM5, H800 PCIe.
2024-12-02December 2024 Expansion89 FR 96790
Extended to HBM bandwidth thresholds; added 140+ Chinese entities
Added HBM bandwidth as a classification criterion. HBM2E and above restricted. Expanded entity list significantly.
No tracked part was newly restricted by this action.
2025-04-15April 2025 H20 License Requirementno Federal Register citation on record
No new threshold metric. License-required determination on the previously-compliant-by-design H20.
BIS imposed a license requirement (presumption of denial) on H20 exports to China. Triggered by evidence that H20's retained 900 GB/s NVLink allowed multi-GPU aggregation approaching banned-chip throughput — the loophole the Oct 2023 TPP rule had not closed. NVIDIA took a $5.5B inventory write-down. AMD's comparable MI308 was also covered.
Newly restricted: H20 SXM, H20E (HBM3E refresh).
2025-07-15July 2025 H20 Re-License Frameworkno Federal Register citation on record
Conditional license approval with a 15% US-revenue-share condition. No technical metric change.
Trump administration approved H20 and AMD MI308 licenses to China conditional on NVIDIA and AMD remitting 15% of China-derived chip revenue to the US Treasury. H20 returned to case-by-case licensed-export status under this framework.
No tracked part was newly restricted by this action.
2026-01-15January 2026 License Review Policy Revision91 FR 1684
No new threshold. Changed review standard for H200-class chips.
Shifted H200 and MI325X exports to China from presumption of denial to case-by-case review. Conditions: ≤50% China volume, compliance certification, third-party testing. Explicitly NAMES only H200 and MI325X — H20 is NOT covered by this revision and remains under the July 2025 licensed-export regime.
No tracked part was newly restricted by this action.
Export control status follows from the specifications against the BIS threshold metrics (ECCN 3A090 and the Total Processing Performance measure). Specifications come from primary vendor datasheets where one exists; where none does, the figures are industry estimates and the record says so — 13 of 36 parts carry the estimated flag, drawn with a dashed stroke and prefixed with a tilde in the register. Huawei publishes no Ascend datasheet, and the NVIDIA parts sold only through the Chinese OEM channel have none either.
Status is stated as of the most recent BIS action on record here, the January 2026 policy revision. Domestic Chinese parts fall outside US export controls directly, but their fabricators inherit equipment restrictions that constrain them indirectly — which is why the domestic rows are drawn as open marks rather than left off the field.
| Memory | Process | |||||
|---|---|---|---|---|---|---|
| Tenstorrent Blackhole p150 | Tenstorrent | — | 512 | 32 GB GDDR6 | — | Not Export-Controlled |
FP16 dense— FP16 sparse— BF16 dense— TF32 dense— TF32 sparse— FP8 dense664 TFLOPS FP8 sparse— FP4 dense— FP4 sparse— INT8— Memory32 GB GDDR6 Memory bandwidth512 GB/s Interconnect bandwidth— Thermal design power300 W Process node— ArchitectureBlackhole (Tensix Gen2) Compliance variant of— Regulatory basis Below ECCN 3A090 thresholds. Sold via direct channels. Conditions None recorded. Source Primary source Tenstorrent Blackhole specifications — open Notes 120 Tensix cores (Gen2), 16 RISC-V big cores, 1.35 GHz AI clock. 664 TFLOPS BLOCKFP8 per chip; 32 GB GDDR6 at 512 GB/s. 4× QSFP-DD 800 G Ethernet for scale-out. FP16/BF16 peak not separately published by Tenstorrent. Released 2025. Companion p100a variant: 28 GB GDDR6 / 448 GB/s / no QSFP-DD; p150b: same as p150a with regional SKU difference. | ||||||
| AWS Trainium3 | Amazon | — | 4,900 | 144 GB HBM3e | TSMC N3 | Not Export-Controlled |
| Google TPU v7 (Ironwood) | — | 7,370 | 192 GB HBM3e | — | Not Export-Controlled | |
| Tenstorrent Wormhole n300 | Tenstorrent | 131 | 576 | 24 GB GDDR6 | — | Not Export-Controlled |
| TPU v5e | — | 819 | 16 GB HBM2e | — | Not Export-Controlled | |
| Google TPU v4 | — | 1,200 | 32 GB HBM2 | 7nm | Not Export-Controlled | |
| Google TPU v5p | — | 2,575 | 95 GB HBM2e | — | Not Export-Controlled | |
| Google TPU v6e (Trillium) | — | 1,638 | 32 GB HBM | — | Not Export-Controlled | |
| Huawei Ascend 910D | Huawei | — | — | — | 5nm | Domestic (China) |
| Ascend 910B | Huawei | 375 | 1,600 | 64 GB HBM2e | SMIC N+2 (~7nm class, 2nd-gen) | Domestic (China) |
| Huawei Ascend 910C | Huawei | — | 3,200 | 128 GB HBM | SMIC N+2 (~7nm class, 2nd-gen) | Domestic (China) |
| Huawei Ascend 920 | Huawei | — | 4,000 | — | SMIC N+3 (6nm-class) | Domestic (China) |
| B30A variant | NVIDIA | — | — | 144 GB HBM3E | TSMC (node unconfirmed) | Designed Compliant |
| H20E (HBM3E refresh) variant | NVIDIA | 148 | — | 144 GB HBM3E | TSMC 4N | Case-by-Case Review |
| H20 SXM variant | NVIDIA | 148 | 4,000 | 96 GB HBM3 | TSMC 4N | Case-by-Case Review |
