Data 2026-03

Scenarios

Five stress cases over the AI-compute supply chain, each dated by when it was last reviewed and by the age of its newest input.

Tokyo Earthquake: Memory and Materials Exposure

No recorded reviewNewest input 2025-Q3Hand-reasoned

No review recorded. The seismic hazard figures are dated; the market-share figures were last reconciled against the concentration table during the 2026-08-12 consolidation, which was a defect repair and not a currency review. The figures on this page are human-authored and sourced individually; they are not produced by the cascade engine. Newest input dated from Newest data_vintage across the module's sourced claims, '2025-Q3' (HBM and DRAM share) — src/lib/data/tokyo-earthquake-data.ts. Review state for all five analyses is on the index.

Japan supplies most of the silicon wafers, advanced photoresist, and lithography equipment that DRAM, NAND, and HBM fabs depend on; a major seismic event removes the inputs every advanced-process line needs to keep running. The Korean fabs are not in either rupture zone — their exposure runs through those same Japanese inputs, and it is hand-reasoned rather than traced through recorded supply-chain edges. The page marks that section as such.

Supply Chain Exposure Analysis

8 Japan fabs, 5 Korea fabs, 4 in scenario zone. HBM concentration (Q3 2025): SK Hynix ~57%, Samsung ~22%, Micron ~21%. HERP probability estimates with fab-level geographic exposure. Active: Nankai Trough megathrust (M8-9 class, modeled at M9.0)Three seismic scenarios mapped against the fabs that produce DRAM, NAND, and HBM memory for AI GPUs. A single event at any of three locations disrupts the entire AI GPU memory supply chain. Active: Nankai Trough megathrust (M8-9 class, modeled at M9.0)

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Magnitude · Severity

Japan supplies the silicon wafers, semiconductor equipment, and one of the three merchant HBM production lines that AI GPUs cannot ship without — with Micron contributing roughly 21% of global HBM (Q3 2025) from Hiroshima alongside the country's dominant SUMCO / Shin-Etsu wafer supply. A M9 event in the active zone sits within JMA Intensity 6+ of 4 memory fabs; the 2011 Tohoku precedent — a 6-month wafer outage — propagated through every advanced-process supply chain on the planet.

Methodology →HERP long-term seismic hazard · Counterpoint Research HBM share + Omdia wafer share · USGS catalog

Active scenarioNankai Trough megathrust (M8-9 class, modeled at M9.0)

Concentration AnalysisHHI + Japan-exposure for DRAM, NAND, HBM, silicon wafers, and equipment markets, plus the fabs in the active scenario zone.4 fabs in scenario zone

Compound ScenariosKorea / Japan / Taiwan multi-country couplings the cascade engine doesn't natively combine — empirical stress on the broader memory chain.3 multi-country

Market ImpactHistorical fab outages (2011 Tohoku, 2016 Kumamoto, etc.) with per-product price impact, recovery time, and market response.4 historical events

Scenario DetailsReference cards for each seismic scenario — magnitude, HERP 30-yr probability, affected fab list, calibration anchor.3 scenarios

MethodologyHERP probability inputs, severity formula (4 weighted factors), per-fab GPU-SKU inference, and source authority tiering.

Rerun this disruption in the engine

The engine runs the Japan–Korea coupling at full density: it seeds the Japanese semiconductor-input cluster (Shin-Etsu, SUMCO, Tokyo Electron, Advantest, and the rest) and propagates the shock forward through recorded supplier–customer edges, reaching Samsung and the Korean supply chain. What it does not capture is the input-dependency path to SK Hynix that this page’s fab-level model reasons about but that is not a recorded edge in the substrate, and the seismic-probability and HBM-qualification detail above — the engine run is the propagation skeleton; this analysis is the flesh.